Robust Optimal Control of Arbitrarily Switched Systems: A Path-Complete Framework
arXiv:2607.15055
2026
Training
2 ideas extracted · analyzed Aug 30, 2026
What the math gives to ML
The paper supplies a constructive way to handle arbitrary discrete switching by assigning separate value or Lyapunov-like functions to nodes of a labeled path-complete graph, then combining them through a reachability-aware min-max operation. This is transferable to robust reinforcement learning and recurrent architectures exposed to unknown sequences of dynamics, corruptions, or update operators: instead of one critic or one stability certificate, train a structured family whose graph edges cover every possible mode transition. The key engineering asset is not merely multiple critics, but the reachability condition that makes a pointwise min-max envelope valid under arbitrary switching. A practical first implementation is a neural robust critic trained with sampled Bellman-inequality violations, followed by interval or Lipschitz verification on a bounded state region if formal certification is required.
Ideas from this paper
✗ Failed on benchmark
2026
Replace a single value critic with graph-indexed critics V_alpha and graph-indexed policy heads pi_A, where the labeled graph covers every possible environment mode at every step. Train sampled Bellman inequalities rather than only equality-based temporal-difference errors, and select the policy head using the paper's min-max reachability rule. This targets robust RL settings in which the transition mode can change arbitrarily, such as unknown actuator regimes, domain randomization modes, or…
Useful8/10
Difficulty5/10
Novelty7/10
△ Mechanism confirmed, baseline not beaten
2026
Turn a path-complete graph into a stability regularizer for a recurrent or state-space neural network whose update can switch among M learned operators. Maintain a neural quadratic or positive scalar certificate V_alpha for each graph node and penalize every graph edge that violates contraction under its corresponding operator. The resulting architecture is designed to remain stable even when the mode sequence is arbitrary rather than generated by a trained gate.
Useful7/10
Difficulty6/10
Novelty8/10